The present invention relates to a semiconductor manufacturing technique and more particularly to a technique useful in its application to the improvement in the quality of a semiconductor device.
As examples of semiconductor devices having a semiconductor chip with a semiconductor integrated circuit formed thereon, further having bump electrodes (e.g., solder balls) as external terminals and a wiring board which supports the semiconductor chip, there are known CSPs (Chip Scale Packages) or BGAs (Ball Grid Arrays).
As to the former CSP there has been developed a CSP which is small-sized and thin-walled, like the chip size or slightly larger than a semiconductor chip, and wherein a semiconductor chip is mounted on one side, i.e., on a chip bearing surface, of a wiring board, the chip bearing surface side being sealed with resin by molding to form a sealing portion.
As a technique for improving the CSP manufacturing efficiency and thereby attaining the reduction of cost there has been developed a block molding method.
According to the block molding method, a multi device substrate is used on which plural device areas corresponding to thin film wiring boards are formed in a partitioned and contiguous manner and are sealed with resin by molding while being covered together. After the sealing with resin, dicing is performed for division (formation of individual pieces) into each device area.
This semiconductor device manufacturing method using such a block molding method, as well as the structure of the semiconductor device are disclosed, for example, in Japanese Unexamined Patent Publication No. 2000-124163 or Hei 11(1999)-214588.